1. Field
Example embodiments relate to apparatuses and/or methods of performing a wear leveling with respect to memory cells of a memory device. Also, example embodiments relate to apparatuses and/or methods of performing a wear leveling with respect to memory cells that may be applied to a memory device that changes a threshold voltage of the memory cells and stores data.
2. Description of the Related Art
A non-volatile semiconductor memory, one of various storage mediums that can maintain stored data even when power is out, is widely used. One representative non-volatile memory is a flash memory, has advantages of a smaller size, less power consumption, and higher reading rate compared to a conventional Hard Disk Drive (HDD). Recently, a Solid State Disk (SSD) is suggested to replace the HDD by using flash memory as mass storage.
Representative flash memories may include a NAND flash memory, NOR flash memory, and the like. A method based on NAND and a method based on NOR are discriminated by different cell array configurations and operation methods.
The flash memory is composed of an arrangement of a plurality of memory cells and a single memory cell may store at least one data bit. The single memory cell includes a control gate and floating gate. Also, an insulator insulates between the control gate and the floating gate, and another insulator insulates between the floating gate and a substrate.
An operation of storing data to the memory cell of the flash memory is called programming and an operation of erasing a program or data is performed by a hot carrier effect or a Fowler-Nordheim Tunneling (F-N tunneling) mechanism.